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Modify simple mux to show segfault
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thiskappaisgrey committed Dec 8, 2023
1 parent 1f0ec58 commit 5b4860c
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3 changes: 2 additions & 1 deletion backends/lakeroad/tests/simple-mux.sv
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// RUN: "$YOSYS" -p 'read_verilog -sv %s; prep -top test; pmuxtree; write_lakeroad'
// RUN: "$YOSYS" -p 'read_verilog -sv %s; prep -top test; pmuxtree;\
// RUN: proc; opt; memory; opt; techmap; opt; abc; opt; write_lakeroad'
module test(input [2:0] a, output [2:0] out);
// assign out = ~ a;
always_comb begin
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