DMA impl improvements

1. Wrap the TX transfer struct in a helper type which also
   checks whether the TC IRQ flag was set. This is strongly
   recommended in the datasheet
2. Basic refactoring to prepare allowing checks of events
   for both the split Tx and Rx handle

CHANGELOG.md

@@ -68,6 +68,24 @@ No changes.
 ### Changed
 
 - The MSRV was bumped to 1.59 ([#340])
+### Changed
+
+- serial: The DMA functions `write_all` and `read_exact` now returns
+  the wrapper structs `SerialDmaTx` and `SerialDmaRx` instead of the direct
+  DMA transfer struct. These allow checking the USART ISR events
+  with `is_event_triggered` as well.
+
+### Fixed
+
+- serial: The previous DMA `write_all` implementation did use the DMA transfer completion
+  event to check for transfer completion, but MCU datasheet specifies that the TC
+  flag of the USART peripheral should be checked for transfer completion to avoid
+  corruption of the last transfer. This is now done by the new `SerialDmaTx` wrapper.
+
+## Added
+
+- serial: Public `is_event_triggered` method which allows to check for events
+  given an event and a USART reference.
 
 ## [v0.9.1] - 2022-09-07
 

src/dma.rs

@@ -172,6 +172,11 @@ impl<B, C: Channel, T: Target> Transfer<B, C, T> {
 
         self.stop()
     }
+
+    pub(crate) fn target(&self) -> &T {
+        let inner = crate::unwrap!(self.inner.as_ref());
+        &inner.target
+    }
 }
 
 impl<B, C: Channel, T: Target> Drop for Transfer<B, C, T> {