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NativeAOT: Loop alignment support for xarch #81206

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merged 5 commits into from
Jan 31, 2023
Merged

NativeAOT: Loop alignment support for xarch #81206

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a1148e7
NativeAOT: Add loop alignment scenario
kunalspathak Jan 26, 2023
2e3b90c
Review comment
kunalspathak Jan 27, 2023
c5b6d82
jit format
kunalspathak Jan 27, 2023
a5c97c5
Address review feddback
kunalspathak Jan 30, 2023
165ead6
address feedback
kunalspathak Jan 31, 2023
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2 changes: 1 addition & 1 deletion src/coreclr/jit/compiler.cpp
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Expand Up @@ -3902,7 +3902,7 @@ void Compiler::compSetOptimizationLevel()
codeGen->setFrameRequired(true);
#endif

if (opts.jitFlags->IsSet(JitFlags::JIT_FLAG_PREJIT))
if (opts.jitFlags->IsSet(JitFlags::JIT_FLAG_PREJIT) && !IsTargetAbi(CORINFO_NATIVEAOT_ABI))
{
// The JIT doesn't currently support loop alignment for prejitted images.
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// (The JIT doesn't know the final address of the code, hence
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7 changes: 5 additions & 2 deletions src/coreclr/jit/emit.cpp
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Expand Up @@ -6385,7 +6385,8 @@ unsigned emitter::emitEndCodeGen(Compiler* comp,
// For x64/x86/arm64, align methods that are "optimizations enabled" to 32 byte boundaries if
// they are larger than 16 bytes and contain a loop.
//
if (emitComp->opts.OptimizationEnabled() && !emitComp->opts.jitFlags->IsSet(JitFlags::JIT_FLAG_PREJIT) &&
if (emitComp->opts.OptimizationEnabled() &&
(!emitComp->opts.jitFlags->IsSet(JitFlags::JIT_FLAG_PREJIT) || comp->IsTargetAbi(CORINFO_NATIVEAOT_ABI)) &&
(emitTotalHotCodeSize > 16) && emitComp->fgHasLoops)
{
codeAlignment = 32;
Expand Down Expand Up @@ -6447,7 +6448,9 @@ unsigned emitter::emitEndCodeGen(Compiler* comp,
#ifdef DEBUG
if ((allocMemFlag & CORJIT_ALLOCMEM_FLG_32BYTE_ALIGN) != 0)
{
assert(((size_t)codeBlock & 31) == 0);
// For NativeAOT, codeBlock will not be necessarily aligned, but it is aligned
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// in final obj file.
assert((((size_t)codeBlock & 31) == 0) || comp->IsTargetAbi(CORINFO_NATIVEAOT_ABI));
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This should check JIT_FLAG_PREJIT instead. This would be a problem for R2R too if/once we enable the alignment for it.

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This would be a problem for R2R too if/once we enable the alignment for it.

Should we go ahead and add loop alignment support for R2R too?

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Should we go ahead and add loop alignment support for R2R too?

@dotnet/crossgen-contrib for thoughts - it would probably make sense to enable loop alignment for composite R2R or large version bubbles, but not sure it's worth it for regular R2R that has other throughput issues - it would probably just be a size regression. We'd probably want a way to control this from the EE side. It feels like it's going to be a question out of scope of this PR, but I'll let crossgen2 owners decide.

}
#if 0
// TODO: we should be able to assert the following, but it appears crossgen2 doesn't respect them,
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10 changes: 7 additions & 3 deletions src/coreclr/jit/emitxarch.cpp
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Expand Up @@ -11236,7 +11236,11 @@ BYTE* emitter::emitOutputAlign(insGroup* ig, instrDesc* id, BYTE* dst)
// For cases where 'align' was placed behind a 'jmp' in an IG that does not
// immediately preced the loop IG, we do not know in advance the offset of
// IG having loop. For such cases, skip the padding calculation validation.
bool validatePadding = !alignInstr->isPlacedAfterJmp;

// For NativeAOT, `dst` is not aliged as requested, but the final assembly will have them aligned.
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// So, just calculate the offset of the current `dst` from the start.
size_t offset = emitComp->IsTargetAbi(CORINFO_NATIVEAOT_ABI) ? (dst - emitCodeBlock) : (size_t)dst;
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bool validatePadding = !alignInstr->isPlacedAfterJmp;
#endif

// Candidate for loop alignment
Expand All @@ -11247,7 +11251,7 @@ BYTE* emitter::emitOutputAlign(insGroup* ig, instrDesc* id, BYTE* dst)

// Either things are already aligned or align them here.
assert(!validatePadding || (paddingToAdd == 0) ||
(((size_t)dst & (emitComp->opts.compJitAlignLoopBoundary - 1)) != 0));
((offset & (emitComp->opts.compJitAlignLoopBoundary - 1)) != 0));

// Padding amount should not exceed the alignment boundary
assert(0 <= paddingToAdd && paddingToAdd < emitComp->opts.compJitAlignLoopBoundary);
Expand All @@ -11256,7 +11260,7 @@ BYTE* emitter::emitOutputAlign(insGroup* ig, instrDesc* id, BYTE* dst)
if (validatePadding)
{
unsigned paddingNeeded =
emitCalculatePaddingForLoopAlignment(((instrDescAlign*)id)->idaIG->igNext, (size_t)dst, true);
emitCalculatePaddingForLoopAlignment(((instrDescAlign*)id)->idaIG->igNext, offset, true);

// For non-adaptive, padding size is spread in multiple instructions, so don't bother checking
if (emitComp->opts.compJitAlignLoopAdaptive)
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