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[RISC-V, LoongArch64] Fix assert(!regArgMaskLive) in genFnPrologCalle…
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…eRegArgs (#91414)

* [LoongArch64] Fix assert(!regArgMaskLive) in genFnPrologCalleeRegArgs

* [RISC-V] Fix assert(!regArgMaskLive) in genFnPrologCalleeRegArgs
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t-mustafin authored Sep 6, 2023
1 parent a60aab1 commit 593f2d3
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Showing 2 changed files with 3 additions and 0 deletions.
1 change: 1 addition & 0 deletions src/coreclr/jit/codegenloongarch64.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -8625,6 +8625,7 @@ void CodeGen::genFnPrologCalleeRegArgs()
(regNumber)regArg[i]);
regArgNum--;
regArgMaskLive &= ~genRegMask((regNumber)regArg[j]);
regArg[j] = 0;
if (regArgNum == 0)
{
break;
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2 changes: 2 additions & 0 deletions src/coreclr/jit/codegenriscv64.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -7960,6 +7960,7 @@ void CodeGen::genFnPrologCalleeRegArgs()
0);
regArgNum--;
regArgMaskLive &= ~genRegMask((regNumber)regArg[j]);
regArg[j] = 0;
}
else if (k == i)
{
Expand Down Expand Up @@ -8037,6 +8038,7 @@ void CodeGen::genFnPrologCalleeRegArgs()
(regNumber)regArg[i], (regNumber)regArg[i]);
regArgNum--;
regArgMaskLive &= ~genRegMask((regNumber)regArg[j]);
regArg[j] = 0;
if (regArgNum == 0)
{
break;
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