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Preparing for the BIG Future #208

Merged
merged 45 commits into from
Oct 14, 2024
Merged

Preparing for the BIG Future #208

merged 45 commits into from
Oct 14, 2024

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ashvardanian
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@ashvardanian ashvardanian commented Oct 7, 2024

There are several ongoing efforts to extend the functionality of SimSIMD and this PR prepares some of the groundwork for:

  • 🆕 AMD Turin capability level
  • 🆕 Intel Sierra Forest capability level

Those are some amazing CPUs, featuring up to 244 cores per socket, with reduced latencies for some very powerful instructions. Moreover, SimSIMD now provides:

  • 🆕 Spatial kernels for sub-byte i4 vectors
  • 🆕 Sparse Dot Products

This PR also:

  • Fixes cdist for complex inputs
  • Enables dynamic dispatch in Swift
  • Enables dynamic dispatch in JavaScript
  • Ships a new benchmarking suite

@ashvardanian ashvardanian force-pushed the main-dev branch 3 times, most recently from 4719c27 to 54ae495 Compare October 8, 2024 00:16
@ashvardanian ashvardanian changed the title AMD Turin Support AMD Turin Support & Faster i8 Kernels Oct 9, 2024
This improvement accelerates the `i8`
Haswell kernels:
- dot: 37 to 54 GB/s
- cos: 17 to 18 GB/s
@ashvardanian ashvardanian changed the title AMD Turin Support & Faster i8 Kernels AMD Turin, Integral Kernels, & Sparse Dot Products Oct 9, 2024
@ashvardanian ashvardanian changed the title AMD Turin, Integral Kernels, & Sparse Dot Products AMD Turin, Intel Sierra Forest, i4, & Sparse Dot Products Oct 14, 2024
@ashvardanian ashvardanian changed the title AMD Turin, Intel Sierra Forest, i4, & Sparse Dot Products Preparing for the BIG Future Oct 14, 2024
@ashvardanian ashvardanian merged commit eb09af6 into main Oct 14, 2024
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2 participants