Update Branch to Incorporate Changes from dev

Jenkinsfile

@@ -30,7 +30,7 @@
  *
  ******************************************************************************/
 
-node {
+node('finn-build || built-in') {
     def app
     stage('Clone repository') {
         /* Let's make sure we have the repository cloned to our workspace */
@@ -142,6 +142,13 @@ node {
             stage('TMR CHECK') {
                 sh("source ${env.HLS_ENV_SRC}; cd tb; vitis_hls -f test_tmrc_stmr.tcl")
             }
+        }, thirteenthBranch: {
+            stage('FM_PIX_PAD') {
+                sh("source ${env.HLS_ENV_SRC}; cd tb; vitis_hls -f test_fm_pixel_padding.tcl")
+            }
+            stage('DECONV_2D') {
+                sh("source ${env.HLS_ENV_SRC}; cd tb; vitis_hls -f test_deconv2d.tcl")
+            }
         }
     }
 }

docs/requirements.txt

@@ -1,11 +1,40 @@
+#   Copyright (c) 2019, Xilinx, Inc.
+#   All rights reserved.
+#
+#   Redistribution and use in source and binary forms, with or without
+#   modification, are permitted provided that the following conditions are met:
+#
+#   1.  Redistributions of source code must retain the above copyright notice,
+#       this list of conditions and the following disclaimer.
+#
+#   2.  Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in the
+#       documentation and/or other materials provided with the distribution.
+#
+#   3.  Neither the name of the copyright holder nor the names of its
+#       contributors may be used to endorse or promote products derived from
+#       this software without specific prior written permission.
+#
+#   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+#   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+#   THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+#   PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
+#   CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+#   EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+#   PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+#   OR BUSINESS INTERRUPTION). HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+#   WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+#   OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+#   ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
 alabaster==0.7.12
 Babel==2.9.1
 breathe==4.13.0.post0
-certifi==2019.3.9
+certifi==2022.12.7
 chardet==3.0.4
 commonmark==0.9.0
 docutils==0.14
-future==0.17.1
+future==0.18.3
 idna==2.8
 imagesize==1.1.0
 Jinja2==2.11.3

slidingwindow.h

@@ -1186,17 +1186,19 @@ void ConvolutionInputGenerator_2D_kernel1(
 static_assert(IFMChannels % SIMD == 0, "");
 constexpr unsigned COUNTER_WIDTH = clog2(Stride-1) + 1;
 constexpr unsigned COUNTER_RESET = Stride - 2;
+constexpr unsigned MULTIPLYING_FACTOR = IFMChannels/SIMD;
 	for (unsigned int im=0; im<numReps; im++) {
+#pragma HLS performance target_ti=IFMDim*IFMDim*IFMChannels/SIMD
 		ap_int<COUNTER_WIDTH> counter_y = -1;
 		for (unsigned int y = 0; y < IFMDim; y++) {
 			const bool keep_y = counter_y < 0;
 			counter_y = keep_y ? ap_int<COUNTER_WIDTH>(COUNTER_RESET) : ap_int<COUNTER_WIDTH>(counter_y - 1);
 			ap_int<COUNTER_WIDTH> counter_x = -1;
 			for (unsigned int x = 0; x < IFMDim; x++) {
+#pragma HLS pipeline style=flp II=IFMChannels/SIMD
 				const bool keep_x = counter_x < 0;
 				counter_x = keep_x ? ap_int<COUNTER_WIDTH>(COUNTER_RESET) : ap_int<COUNTER_WIDTH>(counter_x - 1);
-				for (unsigned int count_simd = 0; count_simd < IFMChannels/SIMD; count_simd++) {
-#pragma HLS pipeline style=flp II=1
+				for (unsigned int count_simd = 0; count_simd < MULTIPLYING_FACTOR; count_simd++) {
 					ap_uint<SIMD*Input_precision> inElem = in.read();
 					if (keep_y && keep_x) {
 						out.write(inElem);

streamtools.h

@@ -417,6 +417,82 @@ void FMPadding_Batch(
 	}
 }
 
+/**
+ * \brief Feature map pixel padding - Pads each pixel in the input feature
+ *        map with zeros. Used as a pre-processing step for the transposed
+ * 		  convolution operation. Expects data in NHWC format, where N=1.
+ *
+ * \tparam OutputDim_x Padded width of the output feature map
+ * \tparam OutputDim_y Padded height of the output feature map
+ * \tparam Stride_x    Stride for each pixel along the width dimension 
+ * \tparam Stride_y    Stride for each pixel along the height dimension
+ * \tparam NumChannels Number of channels of the input feature map
+ * \tparam SIMD		   Input parallelism 
+ * \tparam In_t		   Input datatype
+ *
+ * @param src          Input stream
+ * @param dst 		   Output stream
+ */
+template<
+	unsigned OutputDim_x,
+	unsigned OutputDim_y,
+	unsigned Stride_x,
+	unsigned Stride_y,
+	unsigned NumChannels,
+	unsigned SIMD,
+	typename In_t
+>
+void FMPadding_Pixel_Nonsquare(
+	hls::stream<ap_uint<SIMD*In_t::width>> &src,
+	hls::stream<ap_uint<SIMD*In_t::width>> &dst
+) {
+	static_assert(NumChannels % SIMD == 0, "SIMD must divide channel count.");
+	constexpr unsigned  Folding = NumChannels/SIMD;
+
+	int unsigned  ytrig = 0;
+	for(int unsigned  y = 0; y < OutputDim_y; y++) {
+		int unsigned  xtrig = 0;
+		for(int unsigned  x = 0; x < OutputDim_x; x++) {
+			for(int unsigned  sf = 0; sf < Folding; sf++) {
+#pragma HLS pipeline II=1 style=flp
+				ap_uint<SIMD*In_t::width>  value = 0;
+				if((ytrig == 0) && (xtrig == 0))  value = src.read();
+				dst.write(value);
+			}
+			if(++xtrig == Stride_x)  xtrig = 0;
+		}
+		if(++ytrig == Stride_y)  ytrig = 0;
+	}
+}
+
+/**
+ * \brief Feature map pixel padding - Pads each pixel in the input feature
+ *        map with zeros. Used as a pre-processing step for the transposed
+ * 		  convolution operation. Expects data in NHWC format, where N=1.
+ *
+ * \tparam OutputDim   Padded width of the output feature map
+ * \tparam Stride      Stride for each pixel along the width dimension
+ * \tparam NumChannels Number of channels of the input feature map
+ * \tparam SIMD		   Input parallelism 
+ * \tparam In_t		   Input datatype
+ *
+ * @param src          Input stream
+ * @param dst 		   Output stream
+ */
+template<
+	unsigned OutputDim,
+	unsigned Stride,
+	unsigned NumChannels,
+	unsigned SIMD,
+	typename In_t
+>
+void FMPadding_Pixel(
+	hls::stream<ap_uint<SIMD*In_t::width>> &src,
+	hls::stream<ap_uint<SIMD*In_t::width>> &dst
+) {
+	FMPadding_Pixel_Nonsquare<OutputDim, OutputDim, Stride, Stride, NumChannels, SIMD, In_t>(src, dst);
+}
+
 /**
  * \brief   Stream Data Width Converter - Converts the width of the input stream in the output stream
  *

tb/conv_dws_tb.cpp

@@ -104,7 +104,7 @@ int main()
 	for (unsigned int oy = 0; oy < TY; oy++) {
 		for (unsigned int ox = 0; ox <TX; ox++) {
 			for(int pe=0;pe <PE1;pe++){
-				ap_int<4> quantized_weight = (ap_int<4>) PARAM::weights.weights(kx*KERNEL_DIM + ky)[out_chan_count][0];
+				ap_int<4> quantized_weight = (ap_int<4>) PARAM::weights.weights(0)[out_chan_count][TX-1 - (kx*KERNEL_DIM + ky)];
 				W1[out_chan_count][kx][ky] = quantized_weight;
 				kx++;
 				if (kx==KERNEL_DIM){

tb/conv_dws_top.cpp

@@ -58,9 +58,11 @@ void Testbench_conv_dws(stream<ap_uint<FM_Channels1*INPUT_PRECISION> > & in, str
 	hls::stream<ap_uint<FM_Channels1*ap_uint<INPUT_PRECISION>::width> > resized_stream("resized_stream");
 	hls::stream<ap_uint<PE1*ap_uint<INPUT_PRECISION>::width> > resized_stream_pe("resized_stream_pe");
 	hls::stream<ap_uint<PE1*ap_uint<INPUT_PRECISION>::width> > swg_out("swg_out");
+	hls::stream<ap_uint<PE1*SIMD1*ap_uint<INPUT_PRECISION>::width> > resized_stream_simd("resized_stream_simd");
 	SameResize_Batch<IFMDim1, KERNEL_DIM, STRIDE, FM_Channels1, ap_uint<INPUT_PRECISION> >(in, resized_stream, numReps);
 	StreamingDataWidthConverter_Batch<FM_Channels1*INPUT_PRECISION, PE1*INPUT_PRECISION, (IFMDim1+2)*(IFMDim1+2)>(resized_stream, resized_stream_pe, numReps);
 	ConvolutionInputGenerator_dws<KERNEL_DIM, FM_Channels1, ap_uint<INPUT_PRECISION>::width, IFMDim1+2, OFMDim1, PE1,1>(resized_stream_pe, swg_out, numReps, ap_resource_dflt());
-	Vector_Vector_Activate_Batch<FM_Channels1, KERNEL_DIM*KERNEL_DIM, SIMD1, PE1, MMV1, Slice<ap_uint<INPUT_PRECISION> >, Slice<ap_int<16> >, Identity>(swg_out, out, PARAM::weights, PassThroughActivation<ap_int<16>>(), numReps*OFMDim1*OFMDim1, ap_resource_dsp());
+	StreamingDataWidthConverter_Batch<PE1*INPUT_PRECISION, PE1*SIMD1*INPUT_PRECISION, SIMD1*OFMDim1*OFMDim1>(swg_out, resized_stream_simd, numReps);
+	Vector_Vector_Activate_Batch<FM_Channels1, KERNEL_DIM*KERNEL_DIM, SIMD1, PE1, MMV1, Slice<ap_uint<INPUT_PRECISION> >, Slice<ap_int<16> >, Identity>(resized_stream_simd, out, PARAM::weights, PassThroughActivation<ap_int<16>>(), numReps*OFMDim1*OFMDim1, ap_resource_dsp());
 
 }

tb/data/config-conv-dws.h

@@ -1,5 +1,5 @@
 #define KERNEL_DIM 3 
-#define SIMD1 1
+#define SIMD1 9
 #define PE1 8 
 #define MMV1 1 
 #define WIDTH 4 

tb/data/config_deconv2d.h

@@ -0,0 +1,61 @@
+/******************************************************************************
+ *  Copyright (c) 2023, Advanced Micro Devices, Inc.
+ *  All rights reserved.
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are met:
+ *
+ *  1.  Redistributions of source code must retain the above copyright notice,
+ *     this list of conditions and the following disclaimer.
+ *
+ *  2.  Redistributions in binary form must reproduce the above copyright
+ *      notice, this list of conditions and the following disclaimer in the
+ *      documentation and/or other materials provided with the distribution.
+ *
+ *  3.  Neither the name of the copyright holder nor the names of its
+ *      contributors may be used to endorse or promote products derived from
+ *      this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ *  THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ *  PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ *  OR BUSINESS INTERRUPTION). HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ *  WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *  OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ *  ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ******************************************************************************/
+
+#ifndef DECONV_CONF_H
+#define DECONV_CONF_H
+
+constexpr unsigned  IFDim1 = 4;
+constexpr unsigned  IFMCh1 = 1;
+constexpr unsigned  OFDim1 = 7;
+constexpr unsigned  OFMCh1 = 1;
+constexpr unsigned  Kernel1 = 4;
+constexpr unsigned  Stride1 = 3;
+constexpr unsigned  Padding1 = 3;
+
+constexpr unsigned  FMPadODim1 = 10;
+constexpr unsigned  FMPadStride1 = 3;
+constexpr unsigned  FMPadSIMD1 = 1;
+
+constexpr unsigned  ConvKernel1 = 4;
+constexpr unsigned  ConvIFMCh1 = 1;
+constexpr unsigned  ConvIFMDim1 = 10;
+constexpr unsigned  ConvOFMCh1 = 1;
+constexpr unsigned  ConvOFMDim1 = 7;
+constexpr unsigned  ConvStride1 = 1;
+constexpr unsigned  ConvSIMD1 = 1;
+constexpr unsigned  ConvPE1 = 1;
+
+constexpr unsigned  IPrecision = 6;
+constexpr unsigned  OPrecision = 16;
+constexpr unsigned  WPrecision = 5;
+
+#endif

tb/data/config_fmpp.h

@@ -0,0 +1,46 @@
+/******************************************************************************
+ *  Copyright (c) 2023, Advanced Micro Devices, Inc.
+ *  All rights reserved.
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are met:
+ *
+ *  1.  Redistributions of source code must retain the above copyright notice,
+ *     this list of conditions and the following disclaimer.
+ *
+ *  2.  Redistributions in binary form must reproduce the above copyright
+ *      notice, this list of conditions and the following disclaimer in the
+ *      documentation and/or other materials provided with the distribution.
+ *
+ *  3.  Neither the name of the copyright holder nor the names of its
+ *      contributors may be used to endorse or promote products derived from
+ *      this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ *  THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ *  PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ *  OR BUSINESS INTERRUPTION). HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ *  WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *  OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ *  ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ ******************************************************************************/
+
+#ifndef FMPP_CONFIG_H
+#define FMPP_CONFIG_H
+
+constexpr unsigned  SIMD1 = 1;
+constexpr unsigned  INPUT_WIDTH = 8;
+constexpr unsigned  INPUT_DIM_X = 30;
+constexpr unsigned  INPUT_DIM_Y = 40;
+constexpr unsigned  CHANNELS = 3;
+constexpr unsigned  XSTRIDE = 5;
+constexpr unsigned  YSTRIDE = 3;
+
+constexpr unsigned  OUTPUT_DIM_X = INPUT_DIM_X + (INPUT_DIM_X - 1) * (XSTRIDE - 1);
+constexpr unsigned  OUTPUT_DIM_Y = INPUT_DIM_Y + (INPUT_DIM_Y - 1) * (YSTRIDE - 1);
+
+#endif