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Merge pull request verilog-to-routing#1510 from byuccl/python_require…
…ments_added Python requirements added
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Original file line number | Diff line number | Diff line change |
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@@ -1,3 +1,3 @@ | ||
#!/usr/bin/env bash | ||
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find vpr libs/libarchfpga ODIN_II vtr_flow/arch utils/fasm/test -name '*.xml' | xargs -n 1 ./vtr_flow/scripts/upgrade_arch.py | ||
find vpr libs/libarchfpga ODIN_II vtr_flow/arch utils/fasm/test -name '*.xml' | xargs -n 1 python3 ./vtr_flow/scripts/upgrade_arch.py |
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,4 @@ | ||
black | ||
prettytable | ||
pylint | ||
lxml |