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Unable to vectorize simple loops #8
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This port is in very early stages. I think the only support that exists at present is assembling and disassembling vector instructions. |
Recently, the patch was merged into llvm trunk. Is there a way to codegen to the vector-extension from LLVM-IR? |
Maybe @Hsiangkai @zakk0610 or @ebahapo could update the latest status for you. |
No, llvm trunk only supports assembling and disassembling for RVV 0.8. |
I am experiementing with riscv vector extension using the rvv branch. I am unable to vectorize even simple loops that I am able to vectorize in x86 (verified the results from opt-remarks).
Am I missing anything?
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