diff --git a/.github/workflows/main.yml b/.github/workflows/main.yml
index 9b7648f9..08da5d66 100644
--- a/.github/workflows/main.yml
+++ b/.github/workflows/main.yml
@@ -79,6 +79,7 @@ jobs:
         with:
           crate: cargo-binstall
           version: "1.4"
+          locked: false
       - run: cargo binstall -y --force cargo-risczero
         env:
           GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
diff --git a/LICENSE b/LICENSE
new file mode 100644
index 00000000..1b555676
--- /dev/null
+++ b/LICENSE
@@ -0,0 +1,3 @@
+// Copyright (c) {YEAR} RISC Zero, Inc.
+//
+// All rights reserved.
diff --git a/risc0/core/log.cpp b/risc0/core/log.cpp
index 324937d4..58b4fb79 100644
--- a/risc0/core/log.cpp
+++ b/risc0/core/log.cpp
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/Dialect/IOP/IR/Dialect.cpp b/zirgen/Dialect/IOP/IR/Dialect.cpp
index dc727eaf..c0e0f763 100644
--- a/zirgen/Dialect/IOP/IR/Dialect.cpp
+++ b/zirgen/Dialect/IOP/IR/Dialect.cpp
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/Dialect/IOP/IR/IR.h b/zirgen/Dialect/IOP/IR/IR.h
index 4cf73095..2edbd2a3 100644
--- a/zirgen/Dialect/IOP/IR/IR.h
+++ b/zirgen/Dialect/IOP/IR/IR.h
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/Dialect/IOP/IR/Ops.cpp b/zirgen/Dialect/IOP/IR/Ops.cpp
index 198fae6e..de6e119f 100644
--- a/zirgen/Dialect/IOP/IR/Ops.cpp
+++ b/zirgen/Dialect/IOP/IR/Ops.cpp
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/Dialect/ZHL/IR/Dialect.cpp b/zirgen/Dialect/ZHL/IR/Dialect.cpp
index bf76b97c..3173a087 100644
--- a/zirgen/Dialect/ZHL/IR/Dialect.cpp
+++ b/zirgen/Dialect/ZHL/IR/Dialect.cpp
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/Dialect/ZHL/IR/Ops.cpp b/zirgen/Dialect/ZHL/IR/Ops.cpp
index 0ee33763..7a818ff6 100644
--- a/zirgen/Dialect/ZHL/IR/Ops.cpp
+++ b/zirgen/Dialect/ZHL/IR/Ops.cpp
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/Dialect/ZHL/IR/Types.cpp b/zirgen/Dialect/ZHL/IR/Types.cpp
index a7ffd3d4..c56cb6fc 100644
--- a/zirgen/Dialect/ZHL/IR/Types.cpp
+++ b/zirgen/Dialect/ZHL/IR/Types.cpp
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/Dialect/ZHL/IR/ZHL.h b/zirgen/Dialect/ZHL/IR/ZHL.h
index 41ad4243..06b61d30 100644
--- a/zirgen/Dialect/ZHL/IR/ZHL.h
+++ b/zirgen/Dialect/ZHL/IR/ZHL.h
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/Dialect/ZHLT/Transforms/PassDetail.h b/zirgen/Dialect/ZHLT/Transforms/PassDetail.h
index 2e582d78..47544dac 100644
--- a/zirgen/Dialect/ZHLT/Transforms/PassDetail.h
+++ b/zirgen/Dialect/ZHLT/Transforms/PassDetail.h
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/Dialect/ZStruct/Transforms/PassDetail.h b/zirgen/Dialect/ZStruct/Transforms/PassDetail.h
index 1cad66cc..21cb10e8 100644
--- a/zirgen/Dialect/ZStruct/Transforms/PassDetail.h
+++ b/zirgen/Dialect/ZStruct/Transforms/PassDetail.h
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/Dialect/Zll/Conversion/ZStructToZll/PassDetail.h b/zirgen/Dialect/Zll/Conversion/ZStructToZll/PassDetail.h
index 2230932c..4dfbd73f 100644
--- a/zirgen/Dialect/Zll/Conversion/ZStructToZll/PassDetail.h
+++ b/zirgen/Dialect/Zll/Conversion/ZStructToZll/PassDetail.h
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/Dialect/Zll/Conversion/ZStructToZll/Passes.h b/zirgen/Dialect/Zll/Conversion/ZStructToZll/Passes.h
index e20ce51b..2d197071 100644
--- a/zirgen/Dialect/Zll/Conversion/ZStructToZll/Passes.h
+++ b/zirgen/Dialect/Zll/Conversion/ZStructToZll/Passes.h
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/Dialect/Zll/IR/Attrs.cpp b/zirgen/Dialect/Zll/IR/Attrs.cpp
index dff4211c..3e65bc62 100644
--- a/zirgen/Dialect/Zll/IR/Attrs.cpp
+++ b/zirgen/Dialect/Zll/IR/Attrs.cpp
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/Dialect/Zll/IR/Attrs.h b/zirgen/Dialect/Zll/IR/Attrs.h
index b7ca5c7f..f68f37d4 100644
--- a/zirgen/Dialect/Zll/IR/Attrs.h
+++ b/zirgen/Dialect/Zll/IR/Attrs.h
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/Dialect/Zll/IR/Field.cpp b/zirgen/Dialect/Zll/IR/Field.cpp
index 53d3cce8..4722ba1a 100644
--- a/zirgen/Dialect/Zll/IR/Field.cpp
+++ b/zirgen/Dialect/Zll/IR/Field.cpp
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/Dialect/Zll/IR/Types.h b/zirgen/Dialect/Zll/IR/Types.h
index 1a737e3f..98643e66 100644
--- a/zirgen/Dialect/Zll/IR/Types.h
+++ b/zirgen/Dialect/Zll/IR/Types.h
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/Dialect/Zll/Transforms/AddReductions.cpp b/zirgen/Dialect/Zll/Transforms/AddReductions.cpp
index dcde732b..c3f320ac 100644
--- a/zirgen/Dialect/Zll/Transforms/AddReductions.cpp
+++ b/zirgen/Dialect/Zll/Transforms/AddReductions.cpp
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/Dialect/Zll/Transforms/DropConstraints.cpp b/zirgen/Dialect/Zll/Transforms/DropConstraints.cpp
index 43c5128c..2683e969 100644
--- a/zirgen/Dialect/Zll/Transforms/DropConstraints.cpp
+++ b/zirgen/Dialect/Zll/Transforms/DropConstraints.cpp
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/Dialect/Zll/Transforms/MakePolynomial.cpp b/zirgen/Dialect/Zll/Transforms/MakePolynomial.cpp
index 4964ec42..d9aa6189 100644
--- a/zirgen/Dialect/Zll/Transforms/MakePolynomial.cpp
+++ b/zirgen/Dialect/Zll/Transforms/MakePolynomial.cpp
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/Dialect/Zll/Transforms/MakeVerifyTaps.cpp b/zirgen/Dialect/Zll/Transforms/MakeVerifyTaps.cpp
index 1a8b81fa..286a7e12 100644
--- a/zirgen/Dialect/Zll/Transforms/MakeVerifyTaps.cpp
+++ b/zirgen/Dialect/Zll/Transforms/MakeVerifyTaps.cpp
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/Dialect/Zll/Transforms/PassDetail.h b/zirgen/Dialect/Zll/Transforms/PassDetail.h
index 88c83d61..9c0dd054 100644
--- a/zirgen/Dialect/Zll/Transforms/PassDetail.h
+++ b/zirgen/Dialect/Zll/Transforms/PassDetail.h
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/Dialect/Zll/Transforms/SplitStage.cpp b/zirgen/Dialect/Zll/Transforms/SplitStage.cpp
index 352d918b..6df59c38 100644
--- a/zirgen/Dialect/Zll/Transforms/SplitStage.cpp
+++ b/zirgen/Dialect/Zll/Transforms/SplitStage.cpp
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/circuit/fib/build.rs b/zirgen/circuit/fib/build.rs
index baa698d8..5172b646 100644
--- a/zirgen/circuit/fib/build.rs
+++ b/zirgen/circuit/fib/build.rs
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/circuit/fib/cxx/fp.h b/zirgen/circuit/fib/cxx/fp.h
index 4c48a657..5824a818 100644
--- a/zirgen/circuit/fib/cxx/fp.h
+++ b/zirgen/circuit/fib/cxx/fp.h
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/circuit/fib/src/ffi.rs b/zirgen/circuit/fib/src/ffi.rs
index 038dc51d..cbbebe04 100644
--- a/zirgen/circuit/fib/src/ffi.rs
+++ b/zirgen/circuit/fib/src/ffi.rs
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/circuit/fib/src/lib.rs b/zirgen/circuit/fib/src/lib.rs
index 5c80c7e3..c85c7741 100644
--- a/zirgen/circuit/fib/src/lib.rs
+++ b/zirgen/circuit/fib/src/lib.rs
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/circuit/recursion/bits.h b/zirgen/circuit/recursion/bits.h
index 61fbd615..ef5cbae1 100644
--- a/zirgen/circuit/recursion/bits.h
+++ b/zirgen/circuit/recursion/bits.h
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/circuit/recursion/micro.h b/zirgen/circuit/recursion/micro.h
index 4dbaad07..c8d54902 100644
--- a/zirgen/circuit/recursion/micro.h
+++ b/zirgen/circuit/recursion/micro.h
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/circuit/recursion/sha.h b/zirgen/circuit/recursion/sha.h
index 7fdc29e4..6de8f08f 100644
--- a/zirgen/circuit/recursion/sha.h
+++ b/zirgen/circuit/recursion/sha.h
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/circuit/recursion/test/runner.h b/zirgen/circuit/recursion/test/runner.h
index 226b7cdc..3f222063 100644
--- a/zirgen/circuit/recursion/test/runner.h
+++ b/zirgen/circuit/recursion/test/runner.h
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/circuit/verify/poly.cpp b/zirgen/circuit/verify/poly.cpp
index 3f434a8a..0732eaad 100644
--- a/zirgen/circuit/verify/poly.cpp
+++ b/zirgen/circuit/verify/poly.cpp
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/circuit/verify/poly.h b/zirgen/circuit/verify/poly.h
index a4190c85..4b9c3abe 100644
--- a/zirgen/circuit/verify/poly.h
+++ b/zirgen/circuit/verify/poly.h
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/circuit/verify/test/merkle.cpp b/zirgen/circuit/verify/test/merkle.cpp
index 724d0fac..05c132f9 100644
--- a/zirgen/circuit/verify/test/merkle.cpp
+++ b/zirgen/circuit/verify/test/merkle.cpp
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/circuit/verify/wrap_recursion.h b/zirgen/circuit/verify/wrap_recursion.h
index d287230d..d59b9060 100644
--- a/zirgen/circuit/verify/wrap_recursion.h
+++ b/zirgen/circuit/verify/wrap_recursion.h
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/circuit/verify/wrap_rv32im.h b/zirgen/circuit/verify/wrap_rv32im.h
index 59aaadfb..dd619dc0 100644
--- a/zirgen/circuit/verify/wrap_rv32im.h
+++ b/zirgen/circuit/verify/wrap_rv32im.h
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/compiler/codegen/mustache.h b/zirgen/compiler/codegen/mustache.h
index a8859f45..c49793c7 100644
--- a/zirgen/compiler/codegen/mustache.h
+++ b/zirgen/compiler/codegen/mustache.h
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/compiler/edsl/component.h b/zirgen/compiler/edsl/component.h
index 358820df..b747c8df 100644
--- a/zirgen/compiler/edsl/component.h
+++ b/zirgen/compiler/edsl/component.h
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/compiler/edsl/test.cpp b/zirgen/compiler/edsl/test.cpp
index 4727e261..fecad435 100644
--- a/zirgen/compiler/edsl/test.cpp
+++ b/zirgen/compiler/edsl/test.cpp
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/compiler/zkp/digest.h b/zirgen/compiler/zkp/digest.h
index 378fd571..b8c2e38e 100644
--- a/zirgen/compiler/zkp/digest.h
+++ b/zirgen/compiler/zkp/digest.h
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/compiler/zkp/poseidon_254.cpp b/zirgen/compiler/zkp/poseidon_254.cpp
index ac4aaa8a..4a881071 100644
--- a/zirgen/compiler/zkp/poseidon_254.cpp
+++ b/zirgen/compiler/zkp/poseidon_254.cpp
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/compiler/zkp/poseidon_consts.h b/zirgen/compiler/zkp/poseidon_consts.h
index 692d5603..3d6290e5 100644
--- a/zirgen/compiler/zkp/poseidon_consts.h
+++ b/zirgen/compiler/zkp/poseidon_consts.h
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/compiler/zkp/sha256.h b/zirgen/compiler/zkp/sha256.h
index 6739c889..bafa0eb6 100644
--- a/zirgen/compiler/zkp/sha256.h
+++ b/zirgen/compiler/zkp/sha256.h
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/compiler/zkp/sha_rng.cpp b/zirgen/compiler/zkp/sha_rng.cpp
index ccf5e797..03a51cc1 100644
--- a/zirgen/compiler/zkp/sha_rng.cpp
+++ b/zirgen/compiler/zkp/sha_rng.cpp
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/compiler/zkp/util.cpp b/zirgen/compiler/zkp/util.cpp
index fa6b2de2..92e9879b 100644
--- a/zirgen/compiler/zkp/util.cpp
+++ b/zirgen/compiler/zkp/util.cpp
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/compiler/zkp/util.h b/zirgen/compiler/zkp/util.h
index fc54262a..d4b4ddf5 100644
--- a/zirgen/compiler/zkp/util.h
+++ b/zirgen/compiler/zkp/util.h
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/components/bits.cpp b/zirgen/components/bits.cpp
index 31fd7f9a..ac9fee12 100644
--- a/zirgen/components/bits.cpp
+++ b/zirgen/components/bits.cpp
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/components/bytes.cpp b/zirgen/components/bytes.cpp
index 057c6312..479f3651 100644
--- a/zirgen/components/bytes.cpp
+++ b/zirgen/components/bytes.cpp
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/components/bytes.h b/zirgen/components/bytes.h
index 4cb377bd..53806c2f 100644
--- a/zirgen/components/bytes.h
+++ b/zirgen/components/bytes.h
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/components/fpext.cpp b/zirgen/components/fpext.cpp
index 0e3c71d8..bc167370 100644
--- a/zirgen/components/fpext.cpp
+++ b/zirgen/components/fpext.cpp
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/components/iszero.cpp b/zirgen/components/iszero.cpp
index 47d97ed5..fda85af0 100644
--- a/zirgen/components/iszero.cpp
+++ b/zirgen/components/iszero.cpp
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/components/iszero.h b/zirgen/components/iszero.h
index 3be0ef22..fec2d7e3 100644
--- a/zirgen/components/iszero.h
+++ b/zirgen/components/iszero.h
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/components/mux.h b/zirgen/components/mux.h
index 76fcca58..7540b1c8 100644
--- a/zirgen/components/mux.h
+++ b/zirgen/components/mux.h
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/components/onehot.cpp b/zirgen/components/onehot.cpp
index eff32f1a..c6596b73 100644
--- a/zirgen/components/onehot.cpp
+++ b/zirgen/components/onehot.cpp
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/components/reg.h b/zirgen/components/reg.h
index 6818b6da..765f2ec3 100644
--- a/zirgen/components/reg.h
+++ b/zirgen/components/reg.h
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/components/test/bits.cpp b/zirgen/components/test/bits.cpp
index b1055a36..36f870f5 100644
--- a/zirgen/components/test/bits.cpp
+++ b/zirgen/components/test/bits.cpp
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/components/test/fpext.cpp b/zirgen/components/test/fpext.cpp
index aaff8172..fb177448 100644
--- a/zirgen/components/test/fpext.cpp
+++ b/zirgen/components/test/fpext.cpp
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/components/test/mux.cpp b/zirgen/components/test/mux.cpp
index 062f5800..35759a25 100644
--- a/zirgen/components/test/mux.cpp
+++ b/zirgen/components/test/mux.cpp
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/components/test/onehot.cpp b/zirgen/components/test/onehot.cpp
index 5a9c39de..c01d1290 100644
--- a/zirgen/components/test/onehot.cpp
+++ b/zirgen/components/test/onehot.cpp
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/components/test/test_runner.cpp b/zirgen/components/test/test_runner.cpp
index 6251b3bf..7df3ef07 100644
--- a/zirgen/components/test/test_runner.cpp
+++ b/zirgen/components/test/test_runner.cpp
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/components/test/test_runner.h b/zirgen/components/test/test_runner.h
index babd3a13..0577fe8f 100644
--- a/zirgen/components/test/test_runner.h
+++ b/zirgen/components/test/test_runner.h
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/components/test/test_with_bytes.h b/zirgen/components/test/test_with_bytes.h
index 7a6a603b..d7917e7b 100644
--- a/zirgen/components/test/test_with_bytes.h
+++ b/zirgen/components/test/test_with_bytes.h
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/components/test/u32.cpp b/zirgen/components/test/u32.cpp
index 8ea04e05..57eda1af 100644
--- a/zirgen/components/test/u32.cpp
+++ b/zirgen/components/test/u32.cpp
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/dsl/lower.h b/zirgen/dsl/lower.h
index a7a1c17f..c80dc284 100644
--- a/zirgen/dsl/lower.h
+++ b/zirgen/dsl/lower.h
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/dsl/parser.h b/zirgen/dsl/parser.h
index d2917d2f..f24ad8fd 100644
--- a/zirgen/dsl/parser.h
+++ b/zirgen/dsl/parser.h
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/dsl/passes/PassDetail.h b/zirgen/dsl/passes/PassDetail.h
index 0c106d6d..0bc26f38 100644
--- a/zirgen/dsl/passes/PassDetail.h
+++ b/zirgen/dsl/passes/PassDetail.h
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.
 
diff --git a/zirgen/dsl/test/types.cpp b/zirgen/dsl/test/types.cpp
index 1beaf4f3..8b656779 100644
--- a/zirgen/dsl/test/types.cpp
+++ b/zirgen/dsl/test/types.cpp
@@ -1,4 +1,4 @@
-// Copyright (c) 2023 RISC Zero, Inc.
+// Copyright (c) 2024 RISC Zero, Inc.
 //
 // All rights reserved.