openocd_hifive1_revb.cfg

#/****************************************************************************
# *
# *   Copyright (C) 2023 bsvtgc@gmail.com. All rights reserved.
# *   Author: Vincent <bsvtgc@gmail.com>
# *
# ****************************************************************************/

# -----------------------------------------------------#

# This is a plain vanilla openOCD config to load the 
# executable into FE310-G002 target on hifive1-revb
# board. 

# ----------------------------------------------------#

adapter speed 4000

adapter driver jlink
transport select jtag

set _CHIPNAME riscv
jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x20000913

set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME.0 riscv -chain-position $_TARGETNAME

# set work area in RAM 0x8000_0000 with size 0x4000

$_TARGETNAME.0 configure -work-area-phys 0x80000000 -work-area-size 0x4000 -work-area-backup 0

# No virtual to mem conversion

riscv set_enable_virt2phys off
riscv set_enable_virtual off

# Run stage
init

# set JTAG command version 3 to be used
jlink jtag 3

# Halt target
halt