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SystickDelay should support bigger ticks value #7

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Geobert opened this issue Sep 24, 2019 · 0 comments
Open

SystickDelay should support bigger ticks value #7

Geobert opened this issue Sep 24, 2019 · 0 comments

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@Geobert
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Geobert commented Sep 24, 2019

There's an assert!(ticks < (1 << 24)); and on efr32fg1p, the freq is 26MHz in WS0 mode (and 40MHz in WS1 mode).

So when delaying for 1s, we got 26_000_000 ticks which trigger the assert.
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@Geobert