The Digital Support Library contains useful circuits that facilitate work with the
Digital simulator as well as extend its functionality.
Since Digital has the functionality to export circuits to VHDL or Verilog, some circuits are modeled after the VHDL standard library.
Most of the circuits are generic, that means you have the possibility to set the bit width or other properties.
| Name | Implemented | Documented | Tested |
|---|---|---|---|
| Logic | |||
| And Reduce | ☑ | ☑ | ☑ |
| NAnd Reduce | ☑ | ☑ | ☑ |
| NOr Reduce | ☑ | ☑ | ☑ |
| Or Reduce | ☑ | ☑ | ☑ |
| XNOr Reduce | ☑ | ☑ | ☑ |
| XOr Reduce | ☑ | ☑ | ☑ |
| Integer | |||
| Adder Subtractor | ☑ | ☑ | ☑ |
| Distance | ☑ | ☑ | ☑ |
| Absolute | ☑ | ☑ | ☑ |
| Find Leftmost | ☑ | ☑ | ☑ |
| Find Rightmost | ☑ | ☑ | ☑ |
| Bit Reverser | ☑ | ☑ | ☑ |
| Barrel Shifter | ☐ | ☐ | ☐ |
| Bit Extender | ☑ | ☑ | ☑ |
| Integer Resize | ☑ | ☑ | ☐ |
| Square Root | ☑ | ☑ | ☐ |
| Fixed Point | |||
| Fixed Adder | ☑ | ☑ | ☐ |
| Fixed Subtract | ☑ | ☑ | ☐ |
| Fixed Multiply | ☑ | ☑ | ☐ |
| Fixed Divide | ☑ | ☑ | ☐ |
| Fixed Reminder | ☐ | ☐ | ☐ |
| Fixed Modulo | ☐ | ☐ | ☐ |
| Fixed Resize | ☑ | ☑ | ☐ |
| Fixed To Integer | ☑ | ☑ | ☐ |
| Integer To Fixed | ☑ | ☑ | ☐ |
| Dynamic Fixed Point | |||
| Dynamic Fixed Adder | ☑ | ☑ | ☐ |
| Dynamic Fixed Subtract | ☑ | ☑ | ☐ |
| Dynamic Fixed Negation | ☑ | ☑ | ☐ |
| Dynamic Fixed Absolute | ☑ | ☑ | ☐ |
| Dynamic Fixed Multiply | ☑ | ☑ | ☐ |
| Dynamic Fixed Divide | ☑ | ☑ | ☐ |
| Dynamic Fixed Reminder | ☐ | ☐ | ☐ |
| Dynamic Fixed Modulo | ☐ | ☐ | ☐ |
| Dynamic Fixed Scalb | ☑ | ☑ | ☐ |
| Dynamic Fixed Square Root | ☑ | ☑ | ☐ |
| Complex Fixed Point | |||
| Complex Fixed Adder | ☑ | ☑ | ☐ |
| Complex Fixed Subtract | ☑ | ☑ | ☐ |
| Complex Fixed Multiply | ☑ | ☑ | ☐ |
| Complex Fixed Division | ☑ | ☑ | ☐ |
| Complex Fixed Magnitude | ☑ | ☑ | ☐ |
| Complex Fixed Square | ☑ | ☑ | ☐ |
| Floating Point | |||
| Float Adder | ☑ | ☐ | ☑ |
| Float Subtract | ☑ | ☐ | ☐ |
| Float Negation | ☑ | ☐ | ☐ |
| Float Absolute | ☑ | ☐ | ☐ |
| Float Is Negative | ☑ | ☐ | ☐ |
| Float Copysign | ☑ | ☐ | ☐ |
| Float Multiply | ☑ | ☐ | ☐ |
| Float Multiply Add | ☐ | ☐ | ☐ |
| Float Divide | ☑ | ☐ | ☐ |
| Float Reminder | ☐ | ☐ | ☐ |
| Float Modulo | ☐ | ☐ | ☐ |
| Float Logb | ☐ | ☐ | ☐ |
| Float Scalb | ☑ | ☐ | ☐ |
| Float Square Root | ☑ | ☐ | ☐ |
| Float To Integer | ☑ | ☐ | ☐ |
| Float To Fixed | ☐ | ☐ | ☐ |
| Integer to Float | ☐ | ☐ | ☐ |
| Fixed to Float | ☐ | ☐ | ☐ |
| Float Comparator | ☑ | ☐ | ☐ |
| Float Break Number | ☑ | ☐ | ☐ |
| Float Check Round | ☑ | ☐ | ☐ |
| Float Classify | ☑ | ☐ | ☐ |
| Float Normalize | ☑ | ☐ | ☐ |
| Control Logic | |||
| Edge Detector | ☑ | ☑ | ☐ |
| Trigger | ☑ | ☑ | ☐ |
| Variable Clock Divider | ☑ | ☑ | ☐ |
| While Loop | ☑ | ☑ | ☐ |
| For Loop | ☑ | ☑ | ☐ |
| IO | |||
| Graph Plotter | ☑ | ☑ | ☐ |
| Memory | |||
| Counter Asynchronous | ☑ | ☐ | ☐ |
| Counter Preset Asynchronous | ☑ | ☐ | ☐ |
| Register Asynchronous | ☑ | ☐ | ☐ |
| Register Synchronous | ☑ | ☐ | ☐ |
| Delay Register | ☑ | ☐ | ☐ |
| Shift Register Asynchronous | ☑ | ☐ | ☐ |
| Shift Register Synchronous | ☑ | ☐ | ☐ |
| FIFO Stack | ☐ | ☐ | ☐ |
| LIFO Stack | ☐ | ☐ | ☐ |
Extract the contents to the Digital lib folder.
The Circuits can be found under Componets->Library or in the Sidebar under Library.
Although this library is not complete, I share it because otherwise I would never get it done.
If you use this project and find it helpful, you could contribute to implmenting, documenting or unit testing new or existing circuits.