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How Many LUTs Are Required for the FPGA Minimal System of the Xiangshan Processor to Operate Normally? #3638

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Stars-Collector opened this issue Sep 24, 2024 · 1 comment
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@Stars-Collector
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Stars-Collector commented Sep 24, 2024

Before start

  • I have read the RISC-V ISA Manual and this is not a RISC-V ISA question. 我已经阅读过 RISC-V 指令集手册,这不是一个指令集相关的问题。
  • I have read the XiangShan Documents. 我已经阅读过香山文档。
  • I have searched the previous issues and did not find anything relevant. 我已经搜索过之前的 issue,并没有找到相关的。
  • I have searched the previous discussions and did not find anything relevant. 我已经搜索过之前的 discussions,并没有找到相关的。
  • I have reviewed the commit messages from the relevant commit history. 我已经浏览过相关的提交历史和提交信息。

Describe the question

官方文档没有给出说明

[TRANSLATION]
There are no explanations in the official document.

@Stars-Collector Stars-Collector added the question Question requiring answer label Sep 24, 2024
@Tang-Haojin
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Please refer to #1413 (comment). For Kunminghu, we need even more LUT resource.

@Tang-Haojin Tang-Haojin changed the title 香山处理器的FPGA最小系统需要多少个LUT才能正常运行 How Many LUTs Are Required for the FPGA Minimal System of the Xiangshan Processor to Operate Normally? Sep 25, 2024
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