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CHANGELOG
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commit fd0b1fe3c388a77e8fe00cdd930ca317a91198d4
Author: Dave Liu <r63238@freescale.com>
Date: Wed Mar 26 22:55:32 2008 +0800
drivers: add the support for Freescale SATA controller
Add the Freescale on-chip SATA controller driver to u-boot,
The SATA controller is used on the 837x and 8315 targets,
The driver can be used to load kernel, fs and dtb.
The features list:
- 1.5/3 Gbps link speed
- LBA48, LBA28 support
- DMA and FPDMA support
- Two ports support
Signed-off-by: Dave Liu <daveliu@freescale.com>
commit bede87f4c87c3ccd868cc60ebf792e0560c6d024
Author: Dave Liu <r63238@freescale.com>
Date: Wed Mar 26 22:54:44 2008 +0800
ata: add the readme for SATA command line
Signed-off-by: Dave Liu <daveliu@freescale.com>
commit cd54081cd479e542fc399b8a40651ff11a1ad849
Author: Dave Liu <r63238@freescale.com>
Date: Wed Mar 26 22:53:24 2008 +0800
ata: enable the sata initialize on boot up
Signed-off-by: Dave Liu <daveliu@freescale.com>
commit 69386383c5c2b323c66495b0b0cef6a9714d83bf
Author: Dave Liu <r63238@freescale.com>
Date: Wed Mar 26 22:52:36 2008 +0800
ata: add the fis struct for SATA
Signed-off-by: Dave Liu <daveliu@freescale.com>
commit ffc664e80dfb2e17de0df5ad39e91a02e9c361bc
Author: Dave Liu <r63238@freescale.com>
Date: Wed Mar 26 22:51:44 2008 +0800
ata: add the libata support
add simple libata support in u-boot
Signed-off-by: Dave Liu <daveliu@freescale.com>
commit 8e9bb43429e50df55fa41932cbe65841ff579220
Author: Dave Liu <r63238@freescale.com>
Date: Wed Mar 26 22:50:45 2008 +0800
ata: make the ata_piix driver using new SATA framework
original ata_piix driver is using IDE framework, not real
SATA framework. For now, the ata_piix driver is only used
by x86 sc520_cdp board. This patch makes the ata_piix driver
use the new SATA framework, so
- remove the duplicated command stuff
- remove the CONFIG_CMD_IDE define in the sc520_cdp.h
- add the CONFIG_CMD_SATA define to sc520_cdp.h
Signed-off-by: Dave Liu <daveliu@freescale.com>
commit c7057b529c3c3cb9c0ac9060686a4068f1491bbe
Author: Dave Liu <r63238@freescale.com>
Date: Wed Mar 26 22:49:44 2008 +0800
ata: add the support for SATA framework
- add the SATA framework
- add the SATA command line
Signed-off-by: Dave Liu <daveliu@freescale.com>
commit 83c7f470a4ce94f33600f11ae85ce4dcf00aa90c
Author: Dave Liu <r63238@freescale.com>
Date: Wed Mar 26 22:48:18 2008 +0800
ata: merge the header of ata_piix driver
move the sata.h from include/ to drivers/block/ata_piix.h
Signed-off-by: Dave Liu <daveliu@freescale.com>
commit 9eef62804d9695425b24c87b46a61a7fa74afee0
Author: Dave Liu <r63238@freescale.com>
Date: Wed Mar 26 22:47:06 2008 +0800
ata: merge the ata_piix driver
move the cmd_sata.c from common/ to drivers/ata_piix.c,
the cmd_sata.c have some part of ata_piix controller drivers.
consolidate the driver to have better framework.
Signed-off-by: Dave Liu <daveliu@freescale.com>
commit 5b5eb9ca5b778f763bcf332697b35cc1e747626e
Author: Wolfgang Denk <wd@denx.de>
Date: Wed Mar 26 15:38:47 2008 +0100
Coding style cleanup.
Signed-off-by: Wolfgang Denk <wd@denx.de>
commit da8808df7a9cef5a3d2ee286ef9ebf9de1780660
Author: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Date: Wed Mar 26 13:02:13 2008 +0100
Add CFG_RTC_DS1337_NOOSC to turn off OSC output
The default settings for RTC DS1337 keeps the OSC
output, 32,768 Hz, on. This add CFG_RTC_DS1337_NOOSC to
turn it off.
Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
commit 438a4c11260b4ea9805039b0b4f92f9df5306b02
Author: Wolfgang Denk <wd@denx.de>
Date: Wed Mar 26 11:48:46 2008 +0100
Cleanup coding style, update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
commit 218ca724c08ca8a649f0917cf201cf23d4b33f39
Author: Wolfgang Denk <wd@denx.de>
Date: Wed Mar 26 10:40:12 2008 +0100
README: update documentation (availability, links, etc.)
Signed-off-by: Wolfgang Denk <wd@denx.de>
commit f6b44e0e4d18fe507833a0f76d24a9aa72c123f1
Author: Aras Vaichas <arasv@magtech.com.au>
Date: Tue Mar 25 12:09:07 2008 +1100
USB Storage, add meaningful return value
This patch changes the "usb storage" command to return success if it
finds a USB storage device, otherwise it returns error.
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
commit 18e69a35efbb078403db0c0063986470dad7d082
Author: Anton Vorontsov <avorontsov@ru.mvista.com>
Date: Fri Mar 14 23:20:18 2008 +0300
83xx/fdt_support: let user specifiy FSL USB Dual-Role controller role
Linux understands "host" (default), "peripheral" and "otg" (broken).
Though, U-Boot doesn't restrict dr_mode variable to these values (think
of renames in future).
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
commit c7604783b236e368f225efb7b3efb418fe20b404
Author: Anton Vorontsov <avorontsov@ru.mvista.com>
Date: Fri Mar 14 23:20:30 2008 +0300
tsec: fix link detection for the RTL8211B PHY
RTL8211B sets link state register after autonegotiation complete,
so with bootdelay=0 RTL8211B will report lack of the link.
To fix this, we should wait for aneg to complete, even if the
link is currently down.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
commit 7fa9cbb00dc83fcf175042b6f20c2c9bce9a15f4
Author: Anton Vorontsov <avorontsov@ru.mvista.com>
Date: Mon Mar 24 20:47:09 2008 +0300
mpc83xx: add "fsl,soc" and "fsl,immr" compatible fixups
device_type = "soc" is being deprecated, newer device trees will use
"fsl,soc" and/or "fsl,immr" for the soc nodes.
This patch also adds clock-frequency property for soc nodes (the same
value as bus-frequency).
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
commit 507e2d79c91441a0bb2cd3d0c31c8bfe3f8cec07
Author: Joe D'Abbraccio <ljd015@freescale.com>
Date: Mon Mar 24 13:00:59 2008 -0400
Modified the DDR SDRAM clock control register to delay MCK/MCK_B 3/4 clock
With the original value of 1/2 clock cycle delay, the system ran relatively
stable except when we run benchmarks that are intensive users of memory.
When I run samba connected disk with a HDBENCH test, the system locks-up
or reboots sporadically.
Signed-off by: Joe D'Abbraccio <Joe.D'abbraccio@freescale.com>
commit a7ba32d480a86db5db8dcd8ca66b21b4cadda923
Author: Scott Wood <scottwood@freescale.com>
Date: Mon Mar 24 12:44:13 2008 -0500
mpc83xx: Set PCI I/O bus-address base to zero.
The device trees for these boards describe PCI I/O as starting from
address zero from the device's perspective.
Placing I/O elsewhere may cause problems with certain PCI boards, and may
cause problems with Linux.
Signed-off-by: Scott Wood <scottwood@freescale.com>
commit f700e7df7fecf2d3765ae568ce77ce788cde4f3e
Author: Anton Vorontsov <avorontsov@ru.mvista.com>
Date: Mon Mar 24 20:47:05 2008 +0300
mpc83xx: MPC8360E-RDK: use 33.3(3)MHz CLKIN/SYS_CLK
At least on the "33MHz Pilot" board crystal is actually 33.3MHz.
This patch fixes "system time drifting" problem.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
commit 3a0cfdd576dc9b16d1468d37339182607c697fb7
Author: Anton Vorontsov <avorontsov@ru.mvista.com>
Date: Mon Mar 24 20:47:02 2008 +0300
mpc83xx: MPC8360E-RDK: define CONFIG_OF_STDOUT_VIA_ALIAS
This is needed to update /choosen/linux,stdout-path properly.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
commit 3419eb62f088d7a22f1d2a3cebf76b77e408b5b9
Author: Anton Vorontsov <avorontsov@ru.mvista.com>
Date: Mon Mar 24 20:47:00 2008 +0300
mpc83xx: MPC8360E-RDK: add dhcp command
Plus modify environment to use it and remove bootfile env variable,
it is internal and CONFIG_BOOTFILE is used for these purposes.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
commit d892b2dbb4087a26778bfd42470c3ea7d0e2b6aa
Author: Anton Vorontsov <avorontsov@ru.mvista.com>
Date: Mon Mar 24 20:46:57 2008 +0300
mpc83xx: MPC8360E-RDK: rework ddr setup, enable ecc
Current DDR setup easily causes memory corruption, this patch fixes it.
Also fix TIMING_CFG0_MRS_CYC definition.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
commit d47d49cc37a38f2719a3e1b9bbe08ac810cf2d9a
Author: Anton Vorontsov <avorontsov@ru.mvista.com>
Date: Mon Mar 24 20:46:53 2008 +0300
mpc83xx: MPC8360E-RDK: configure pario pins for AD7843 and FHCI
This patch adds qe pario pins configuration for AD7843 ADC/Touchscreen
controller and FHCI (QE USB).
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
commit 7ad959490962e6842648d87d4bd795ea6cdcce67
Author: Anton Vorontsov <avorontsov@ru.mvista.com>
Date: Mon Mar 24 20:46:51 2008 +0300
mpc83xx: MPC8360E-RDK: add support for NAND
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
commit 9a3e832aeb491861d029991241572ebdf4b5b61b
Author: Anton Vorontsov <avorontsov@ru.mvista.com>
Date: Mon Mar 24 20:46:46 2008 +0300
mpc83xx: MPC8360E-RDK: use RGMII_RXID interface mode
This is needed for BCM PHYs to work on this board.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
commit 300615dc5d9b0a2022fbc6af0c13159e33fd752e
Author: Anton Vorontsov <avorontsov@ru.mvista.com>
Date: Mon Mar 24 20:46:34 2008 +0300
uec: add support for Broadcom BCM5481 Gigabit PHY
This patch adds basic support for Broadcom BCM5481 PHY.
RXD-RXC delay quirk comes from MPC8360E-RDK BSP source, author is
Peter Barada <peterb@logicpd.com>.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
commit 6a600c3a1876bc203445df4f0fd6b12648259666
Author: Anton Vorontsov <avorontsov@ru.mvista.com>
Date: Mon Mar 24 20:46:28 2008 +0300
uec: add support for RGMII_RXID interface mode
PHY drivers will use it to setup software delay between RXD and RXC
signals.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
commit 91cdaa3a9d7562b869d96774e9c9ddf142c0848d
Author: Anton Vorontsov <avorontsov@ru.mvista.com>
Date: Mon Mar 24 20:46:24 2008 +0300
uec: add support for gbit mii status readings
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
commit aabce7fb505ffe55ebf3bf4dcafdae97a581558d
Author: Anton Vorontsov <avorontsov@ru.mvista.com>
Date: Mon Mar 24 17:40:47 2008 +0300
83xx: define CONFIG_OF_STDOUT_VIA_ALIAS for the MPC837XERDB boards
This is primarily for the early console support.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
commit 2bd7460e9283ec98565189b3cdbcfb2bcdcdd635
Author: Anton Vorontsov <avorontsov@ru.mvista.com>
Date: Mon Mar 24 17:40:43 2008 +0300
83xx: initialize serdes for MPC837XRDB boards
On the MPC8377ERDB: 2 SATA and 2 PCI-E.
On the MPC8378ERDB: 2 PCI-E
On the MPC8379ERDB: 4 SATA
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
commit 453316a2a19642d8afcbca7452e40a6b44a197b1
Author: Anton Vorontsov <avorontsov@ru.mvista.com>
Date: Mon Mar 24 17:40:32 2008 +0300
83xx: serdes setup routines
This patch adds few routines to configure serdes on 837x targets.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
commit a796cdf9c377cb4e5d61d1079a296608f8fbd903
Author: Anton Vorontsov <avorontsov@ru.mvista.com>
Date: Mon Mar 24 17:40:27 2008 +0300
83xx: split COBJS onto separate lines
..plus get rid of some #ifdefs in the .c files.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
commit 46a3aeea73c13ab04ebf7a8739afb87ac5da94a3
Author: Anton Vorontsov <avorontsov@ru.mvista.com>
Date: Mon Mar 24 17:40:23 2008 +0300
83xx: nand support for MPC837XRDB boards
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
commit 82e45a204190593e8613145a928f998fb8c909c4
Author: Jerry Van Baren <gvb.uboot@gmail.com>
Date: Tue Mar 18 21:44:41 2008 -0400
Enable CONFIG_FLASH_SHOW_PROGRESS on the MPC8360EMDS.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
commit 0fa7a1b4719e325fce332689fb8754ec166191ff
Author: Michael Barkowski <michael.barkowski@freescale.com>
Date: Thu Mar 20 13:15:39 2008 -0400
mpc8323erdb: remove RTC and add EEPROM
There's no on-board RTC on the MPC8323ERDB, but there is an EEPROM.
Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
commit 5bbeea86eb6afb872374cd23217cb3c1018443ed
Author: Michael Barkowski <michael.barkowski@freescale.com>
Date: Thu Mar 20 13:15:34 2008 -0400
mpc8323erdb: Improve the system performance
The following changes are based on kernel UCC ethernet performance:
1. Make the CSB bus pipeline depth as 4, and enable the repeat mode
2. Optimize transactions between QE and CSB. Added CFG_SPCR_OPT
switch to enable this setting.
The following changes are based on the App Note AN3369 and
verified to improve memory latency using LMbench:
3. CS0_CONFIG[AP_n_EN] is changed from 1 to 0
4. CS0_CONFIG[ODT_WR_CONFIG] set to 1. Was a reserved setting
previously.
5. TIMING_CFG_1[WRREC] is changed from 3clks to 2clks (based on
Twr=15ns, and this was already the setting in DDR_MODE)
6. TIMING_CFG_1[PRETOACT] is changed from 3clks to 2clks. (based on
Trp=15ns)
7. TIMING_CFG_1[ACTTOPRE] is changed from 9clks to 6clks. (based on
Tras=40ns)
8. TIMING_CFG_1[ACTTORW] is changed from 3clks to 2clks. (based on
Trcd=15ns)
9. TIMING_CFG_1[REFREC] changed from 21 clks to 11clks. (based on
Trfc=75ns)
10. TIMING_CFG_2[FOUR_ACT] is changed from 10 clks to 7clks. (based
on Tfaw=50ns)
11. TIMING_CFG_2[ADD_LAT] and DDR_MODE[AL] changed from 0 to 1 (based
on CL=3 and WL=2).
Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
commit fc549c871f43933396a5b3e21d897023d4b31b8d
Author: Michael Barkowski <michael.barkowski@freescale.com>
Date: Thu Mar 20 13:15:28 2008 -0400
mpc8323erdb: use readable DDR config macros
Use available shift/mask macros to define DDR configuration.
Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
commit 89c7784ed90ba50301eec521144f95111e472906
Author: Timur Tabi <timur@freescale.com>
Date: Fri Feb 8 13:15:55 2008 -0600
83xx: Add Vitesse VSC7385 firmware uploading
Update the MPC8349E-mITX, MPC8313E-RDB, and MPC837XE-RDB board files to upload
the Vitesse VSC7385 firmware. Changed CONFIG_VSC7385 to CONFIG_VSC7385_ENET.
Cleaned up the board header files to make selecting the VSC7385 easier to
control.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
commit b55d98c6d5b8694e560a0e727b14cb6921d7cfcc
Author: Timur Tabi <timur@freescale.com>
Date: Fri Feb 8 13:15:54 2008 -0600
NET: Add Vitesse VSC7385 firmware uploading
The Vitesse VSC7385 is a 5-port switch found on the Freescale MPC8349E-mITX
and other boards. A small firwmare must be uploaded to its on-board memory
before it can be enabled. This patch adds the code which uploads firmware
(but not the firmware itself).
Previously, this feature was provided by a U-Boot application that was
made available only on Freescale BSPs. The VSC7385 firmware must still
be obtained separately, but at least there is no longer a need for a separate
application.
Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
commit aa6f6d171a1f9f46ee4f03ad6acb97a6bfb71855
Author: Wolfgang Denk <wd@denx.de>
Date: Wed Mar 26 00:52:10 2008 +0100
Coding Style cleanyp; update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
commit 43ddd9c820fec44816188f53346b464e20b3142d
Author: Jerry Van Baren <gvb.uboot@gmail.com>
Date: Sat Mar 22 14:23:49 2008 -0400
Remove deprecated CONFIG_OF_HAS_UBOOT_ENV and CONFIG_OF_HAS_BD_T
These defines embedded the u-boot env variables and/or the bd_t structure
in the fdt blob. The conclusion of discussion on the u-boot email list
was that embedding these in the fdt blob is not useful: there are better
ways of passing the data (in fact, the fdt blob itself replaces the
bd_t struct).
The only board that enables these is the stxxtc and they don't appear
to be used by linux.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
commit 22ed2285743359fd1fe73e411dff914b2256e68f
Author: Stefan Roese <sr@denx.de>
Date: Mon Mar 17 10:49:25 2008 +0100
rtc: Remove 2nd reference to max6900.o in drivers/rtc/Makefile
Signed-off-by: Stefan Roese <sr@denx.de>
commit 1bb707c39a0833e91d9f797dd862aaaaf4af264d
Author: Kyungmin Park <kmpark@infradead.org>
Date: Mon Mar 17 08:54:06 2008 +0900
Add Flex-OneNAND booting support
Flex-OneNAND is a monolithic integrated circuit with a NAND Flash array
using a NOR Flash interface. This on-chip integration enables system designers
to reduce external system logic and use high-density NAND Flash
in applications that would otherwise have to use more NOR components.
Flex-OneNAND enables users to configure to partition it into SLC and MLC areas
in more flexible way. While MLC area of Flex-OneNAND can be used to store data
that require low reliability and high density, SLC area of Flex-OneNAND
to store data that need high reliability and high performance. Flex-OneNAND
can let users take advantage of storing these two different types of data
into one chip, which is making Flex-OneNAND more cost- and space-effective.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
commit c512389cc4a10253249271ff6c887c6dab1f0db2
Author: André Schwarz <andre.schwarz@matrix-vision.de>
Date: Thu Mar 13 13:50:52 2008 +0100
MPC5200: support setup without FEC
Include FEC specific nodes in ft_cpu_setup only if CONFIG_MPC5xxx_FEC is
defined. Systems without FEC, i.e. no FEC node in DTB, should be possible.
Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
commit aa3511e422946041ef626f80a05ae5e8bfc700e6
Author: Jon Loeliger <jdl@freescale.com>
Date: Wed Mar 5 18:05:46 2008 -0600
FSL: Move board/mpc8266ads under board/freescale
Signed-off-by: Jon Loeliger <jdl@freescale.com>
commit 7f1d846e5c5754449c286587d099d85246062772
Author: Jon Loeliger <jdl@freescale.com>
Date: Wed Mar 5 18:05:47 2008 -0600
FSL: Move board/mpc7448hpc2 under board/freescale
Signed-off-by: Jon Loeliger <jdl@freescale.com>
commit b7e24d283e34727c2a6cdfdac2e09a426c579b73
Author: Jon Loeliger <jdl@freescale.com>
Date: Wed Mar 5 18:05:45 2008 -0600
FSL: Move board/mpc8260ads under board/freescale
Signed-off-by: Jon Loeliger <jdl@freescale.com>
commit 6a8a5dc4759867c45aa95580deb8bf26669a5d97
Author: goda.yusuke <goda.yusuke@renesas.com>
Date: Wed Mar 5 17:08:33 2008 +0900
net: Add support AX88796L ethernet device
AX88796L is device of NE2000 compatible.
This patch support AX88796L ethernet device.
Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com>
Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
commit e0a6140dd381e1eed1ada2291166ef2616d8822b
Author: Wolfgang Denk <wd@denx.de>
Date: Tue Mar 25 22:50:41 2008 +0100
ne2000 driver: change #ifdef to Makefile conditional compilation
Signed-off-by: Wolfgang Denk <wd@denx.de>
commit e710185aae90c64d39c2d453e40e58ceefe4f250
Author: goda.yusuke <goda.yusuke@renesas.com>
Date: Wed Mar 5 17:08:20 2008 +0900
net: Divided code of NE2000 ethernet driver
There are more devices of the NE2000 base.
A present code is difficult for us to support more devices.
To support more NE2000 clone devices, separated the function.
Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com>
Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
commit 395bce4f59a507a60a475f7ee46bed47de9482df
Author: Mike Frysinger <vapier@gentoo.org>
Date: Sun Feb 24 23:58:13 2008 -0500
net/Blackfin: move on-chip MAC driver into drivers/net/
The Blackfin on-chip MAC driver was being managed in the BF537-STAMP board
directory, but it is not board specific, so relocate it to the drivers dir
so that other Blackfin ports can utilize it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
commit 8a30b4700942f37495d2e67f5998cdffb6e3ba8a
Author: Mike Frysinger <vapier@gentoo.org>
Date: Sun Feb 24 23:52:35 2008 -0500
smc91111: use SSYNC() rather than asm(ssync) for Blackfin
Since the "ssync" instruction may have hardware anomalies associated with
it, have the smc91111 driver use the SSYNC macro rather than invoking it
directly. We workaround all the anomalies via this macro.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
commit 77ff7b7444ceb8022b46114f3d0b6d18e2fd1138
Author: Bryan O'Donoghue <bodonoghue@codehermit.ie>
Date: Sun Feb 17 22:57:47 2008 +0000
8xx: Update OF support on 8xx
This patch does some shifting around of OF support on 8xx.
Signed-off-by: Bryan O'Donoghue <bodonoghue@codehermit.ie>
commit 9c666a7db0b2285a270c68810889ce7d5dba304b
Author: Kumar Gala <galak@kernel.crashing.org>
Date: Fri Feb 15 15:16:18 2008 -0600
ppc: Allow boards to specify how much memory they can map
For historical reasons we limited the stack to 256M because some boards
could only map that much via BATS. However newer boards are capable of
mapping more memory (for example 85xx is capble of doing up to 2G).
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
commit a6f5f317cd074bbbfa2aab4fca05904c811c19fb
Author: Bryan O'Donoghue <bodonoghue@codehermit.ie>
Date: Fri Feb 15 01:05:58 2008 +0000
8xx : Add OF support to Adder875 board port - resubmit
Signed-off-by: Bryan O'Donoghue <bodonoghue@codehermit.ie>
commit d058698fd2d9f769ff38ac53c8708b3fdd314f2d
Author: Kumar Gala <galak@kernel.crashing.org>
Date: Thu Feb 14 20:44:42 2008 -0600
Add setexpr command
Add a simple expr style command that will set an env variable as the result
of the command. This allows us to do simple math in shell. The following
operations are supported: &, |, ^, +, -, *, /.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
commit 3f105faa64b9826e088711fdfcaa70cb1230397a
Author: Jon Loeliger <jdl@freescale.com>
Date: Wed Mar 5 17:27:48 2008 -0600
FSL: Move board/mpc7448hpc2 under board/freescale
Signed-off-by: Jon Loeliger <jdl@freescale.com>
commit 449c703374a8868453425e15da7e2f76221b72e4
Author: Jon Loeliger <jdl@freescale.com>
Date: Wed Mar 5 17:21:43 2008 -0600
FSL: Move board/mpc8266ads under board/freescale
Signed-off-by: Jon Loeliger <jdl@freescale.com>
commit 5863577989ad689427bb750107e9a75f1c1645d2
Author: Jon Loeliger <jdl@freescale.com>
Date: Wed Mar 5 16:41:41 2008 -0600
FSL: Move board/mpc8260ads under board/freescale
Signed-off-by: Jon Loeliger <jdl@freescale.com>
commit 8a773983957ee6c4aa344469b742f29c7d26afbd
Author: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Date: Tue Mar 25 21:30:08 2008 +0900
[MIPS] Move gth2_config from ARM section to MIPS
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
commit 373b16fc0c5ae34d28b9027f809ae3cbf45cdd15
Author: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Date: Tue Mar 25 21:30:07 2008 +0900
[MIPS] Extend MIPS_MAX_CACHE_SIZE upto 64kB
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
commit d98e348e2ed5aab8f7a6471ff628ab0688b8a459
Author: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Date: Tue Mar 25 21:30:07 2008 +0900
[MIPS] Fix dcache_status()
You can't judge UNCACHED by Config.K0 LSB.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
commit b0c66af53ec9385ac2d1cc2e5d7d1ecdc81caf34
Author: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Date: Tue Mar 25 21:30:07 2008 +0900
[MIPS] Introduce _machine_restart
Handles machine specific functions by using weak functions.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
commit decaba6f5cf386d569ac3997bebb871b966c6b18
Author: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Date: Tue Mar 25 21:30:07 2008 +0900
[MIPS] Cleanup CP0 Status initialization
Add setup_c0_status from Linux. For the moment we disable interrupts, set
CU0, mark the kernel mode, and clear ERL and EXL. This is good enough for
reset-time configuration and will work well across most processors.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
commit d43d43ef2845af309c25a64bb9c2c5fb3261bc23
Author: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Date: Tue Mar 25 21:30:07 2008 +0900
[MIPS] Initialize CP0 Cause before setting up CP0 Status register
Without this change, we'll be suffering from deffered WATCH exception
once Status.EXL is cleared. Make sure Cause.WP is cleared.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
commit 26138623230ca2bad3c78e05a65527ea70c8b688
Author: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Date: Tue Mar 25 21:30:07 2008 +0900
[MIPS] INCA-IP: Move watchdog init code from start.S to lowlevel_init()
Move things to appropriate place.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
commit ccf8f824ef67df028dedb29f8ea5d71a5a88d895
Author: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Date: Tue Mar 25 21:30:06 2008 +0900
[MIPS] Implement flush_cache()
We do Hit_Writeback_Inv_D and Hit_Invalidate_I. You might think that you
don't need to do Hit_Invalidate_I, but flush_cache() needs it since this
function is used not only in U-Boot specfic programs but also at loading
target binaries.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
commit 2e0e5271aac917812a76c72030a2b2c6f1d3387d
Author: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Date: Tue Mar 25 21:30:06 2008 +0900
[MIPS] Fix I-/D-cache initialization loops
Currently we do 1) Index_Store_Tag_I, 2) Fill and 3) Index_Store_Tag_I
again per a loop for I-cache initialization. But according to 'See MIPS
Run', we're encouraged to use three separate loops rather than combining
them *for both I- and D-cache*. This patch tries to fix this.
In accordance with fixing above, mips_init_[id]cache are separated from
mips_cache_reset(), and rewrite cache loops are completely rewritten with
useful macros.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
commit 1898840797c7f50799377bd5b285a8a93a82c419
Author: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Date: Tue Mar 25 21:30:06 2008 +0900
[MIPS] Replace memory clearance code with f_fill64
This routine fills memory with zero by 64 bytes, and is 64-bit capable.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
commit 2f5d414ccb4024dd0992ff6b22561732dbc73590
Author: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Date: Tue Mar 25 21:30:06 2008 +0900
[MIPS] cpu/mips/cache.S: Introduce NESTED/LEAF/END macros
This patch replaces the current function definitions with NESTED, LEAF
and END macro. They specify some more additional information about the
function; an alignment of symbol, type of symbol, stack frame usage, etc.
These information explicitly tells the assembler and the debugger about
the types of code we want to generate.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
commit 282223a607c611425fa33f5428f8eae6636972bb
Author: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Date: Tue Mar 25 11:43:17 2008 +0900
[MIPS] asm headers' updates
Make some asm headers adjusted to the latest Linux kernel.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
commit e1390801a3c1a2b6d12fa90be368efc19f5b9bfd
Author: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Date: Tue Mar 25 11:39:29 2008 +0900
[MIPS] Request for the 'mips_cache_lock()' removal
The initial intension of having mips_cache_lock() was to use the cache
as memory for temporary stack use so that a C environment can be set up
as early as possible.
But now mips_cache_lock() follow lowlevel_init(). We've already have the
real memory initilaized at this point, therefore we could/should use it.
No reason to lock at all.
Other problems:
Cache locking is not consistent across MIPS implementaions. Some imple-
mentations don't support locking at all. The style of locking varies -
some support per line locking, others per way, etc. Some parts use bits
in status registers instead of cache ops. Current mips_cache_lock() is
not necessarily general-purpose.
And this is worthy of special mention; once U-Boot/MIPS locks the lines,
they are never get unlocked, so the code relies on whatever gets loaded
after U-Boot to re-initialize the cache and clear the locks. We're sup-
posed to have CFG_INIT_RAM_LOCK and unlock_ram_in_cache() implemented,
but leave the situation as it is for a long time.
For these reasons, I proposed the removal of mips_cache_lock() from the
global start-up code.
This patch adds CFG_INIT_RAM_LOCK_MIPS to make existing users aware that
*things have changed*. If he wants the same behavior as before, he needs
to have CFG_INIT_RAM_LOCK_MIPS in his config file.
If we don't have any regression report through several releases, then
we'll remove codes entirely.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Acked-by: Andrew Dyer <amdyer@gmail.com>
commit 0d48926c87ec96f974a6ac4034f4a2f2eab3255f
Author: Yuri Tikhonov <yur@emcraft.com>
Date: Mon Mar 24 11:30:54 2008 +0100
lwmon5 SYSMON POST: fix backlight control
If the LWMON5 config has SYSMON POST among CONFIG_POSTs which may be
run on the board, then the SYSMON POST controls the display backlight
(doesn't switch backlight ON if POST FAILED, and does switch the
backlight ON if PASSED).
If not, then the video driver controls the display backlight (just
switch ON the backlight upon initialization).
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
commit ff2bdfb2c1e073f65c065011f1e18d0a130bd3d8
Author: Yuri Tikhonov <yur@emcraft.com>
Date: Mon Mar 24 11:29:14 2008 +0100
lwmon5 SYSMON POST: fix handling of negative temperatures
Fix errors in the LWMON5 Sysmon POST for negative temperatures.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
commit 55774b512fdf63c0516d441cc5da7c54bbffb7f2
Author: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Date: Fri Mar 7 16:04:25 2008 +0900
pci: Add CONFIG_PCI_SKIP_HOST_BRIDGE config option
In current source code, when the device number of PCI is 0, process PCI
bridge without fail. However, when the device number is 0, it is not PCI
always bridge. There are times when device of PCI allocates.
When CONFIG_PCI_SKIP_HOST_BRIDGE is enable, this problem is solved when
use this patch.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Stefan Roese <sr@denx.de>
commit 86aea3eaefa248ffb9328e2b50c64720489cdbeb
Author: Yuri Tikhonov <yur@emcraft.com>
Date: Fri Mar 21 09:18:40 2008 +0100
LWMON5: fix dsPIC POST
Add test for DPIC_SYS_ERROR_REG to be zero in the LWMON5 dsPIC POST.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com> ---
commit 388b82fddc7c05596f3f615f190da0448227dc82
Author: Bartlomiej Sieka <tur@semihalf.com>
Date: Thu Mar 20 23:23:13 2008 +0100
[new uImage] Enable new uImage support for the pcs440ep board.
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
commit 95f4ec2b9c910c7261e6f060ea530d58b039692d
Author: Bartlomiej Sieka <tur@semihalf.com>
Date: Thu Mar 20 23:23:13 2008 +0100
[new uImage] Do not compile new uImage format support by default
Disable default building of new uImage format support in preparation
for merge with the master. Support for new format can be enabled on
a per-board basis, by defining the following in the board's config file:
#define CONFIG_FIT 1
#define CONFIG_OF_LIBFDT 1
This can be optionally defined to give more verbose output:
#define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
commit dafaede8a46c7159310239e036c93e31c6374487
Author: Bartlomiej Sieka <tur@semihalf.com>
Date: Thu Mar 20 23:20:31 2008 +0100
[new uImage] Disable debuging output in preparation for merge with master
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
commit fbe7a155027beacebaee9b32e1ada781fe924bca
Author: Bartlomiej Sieka <tur@semihalf.com>
Date: Thu Mar 20 19:38:45 2008 +0100
[new uImage] Compilation and new uImage handling fixes for imxtract
Fix imxtract command not being compiled-in despite CONFIG_CMD_XIMG being in
include/config_cmd_default.h. Fix few warnings and handling of new format
images.
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
commit 36cc8cbb3379d5166f882641123521735c469f92
Author: Bartlomiej Sieka <tur@semihalf.com>
Date: Thu Mar 20 23:10:19 2008 +0100
[new uImage] Fix autoscr command used with new uImage format
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
commit 43142e817f0597be412e7cbe19413f5532eafa5d
Author: Bartlomiej Sieka <tur@semihalf.com>
Date: Thu Mar 20 23:10:19 2008 +0100
[new uImage] Fix *.its files location in documentation
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
commit 81a0ac62ea29f8252d0a714709d0ecfdbba2a15e
Author: Wolfgang Denk <wd@denx.de>
Date: Thu Mar 20 22:01:38 2008 +0100
lwmon5 POST: remove unreachable code
plus some coding style cleanup
Signed-off-by: Wolfgang Denk <wd@denx.de>
commit b73a19e1609d0f705cbab8014ca17aefe89e4c76
Author: Yuri Tikhonov <yur@emcraft.com>
Date: Thu Mar 20 17:56:04 2008 +0300
LWMON5: POST RTC fix
Modify the RTC API to provide one a status for the time reported by
the rtc_get() function:
0 - a reliable time is guaranteed,
< 0 - a reliable time isn't guaranteed (power fault, clock issues,
and so on).
The RTC chip drivers are responsible for providing this info if the
corresponding chip supports such functionality. If not - always
report that the time is reliable.